International Journal of High Performance Computing Applications, volume 33, issue 1, pages 212-224

An efficient MPI/OpenMP parallelization of the Hartree–Fock–Roothaan method for the first generation of Intel® Xeon Phi™ processor architecture

Publication typeJournal Article
Publication date2017-10-04
Quartile SCImago
Q2
Quartile WOS
Q2
Impact factor3.1
ISSN10943420, 17412846
Hardware and Architecture
Software
Theoretical Computer Science
Abstract

The Hartree–Fock method in the General Atomic and Molecular Structure System (GAMESS) quantum chemistry package represents one of the most irregular algorithms in computation today. Major steps in the calculation are the irregular computation of electron repulsion integrals and the building of the Fock matrix. These are the central components of the main self consistent field (SCF) loop, the key hot spot in electronic structure codes. By threading the Message Passing Interface (MPI) ranks in the official release of the GAMESS code, we not only speed up the main SCF loop (4× to 6× for large systems) but also achieve a significant ([Formula: see text]×) reduction in the overall memory footprint. These improvements are a direct consequence of memory access optimizations within the MPI ranks. We benchmark our implementation against the official release of the GAMESS code on the Intel® Xeon Phi™ supercomputer. Scaling numbers are reported on up to 7680 cores on Intel Xeon Phi coprocessors.

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GOST Copy
Mironov V. et al. An efficient MPI/OpenMP parallelization of the Hartree–Fock–Roothaan method for the first generation of Intel® Xeon Phi™ processor architecture // International Journal of High Performance Computing Applications. 2017. Vol. 33. No. 1. pp. 212-224.
GOST all authors (up to 50) Copy
Mironov V., Moskovsky A., Dmello M. J., Alexeev Y. An efficient MPI/OpenMP parallelization of the Hartree–Fock–Roothaan method for the first generation of Intel® Xeon Phi™ processor architecture // International Journal of High Performance Computing Applications. 2017. Vol. 33. No. 1. pp. 212-224.
RIS |
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RIS Copy
TY - JOUR
DO - 10.1177/1094342017732628
UR - https://doi.org/10.1177%2F1094342017732628
TI - An efficient MPI/OpenMP parallelization of the Hartree–Fock–Roothaan method for the first generation of Intel® Xeon Phi™ processor architecture
T2 - International Journal of High Performance Computing Applications
AU - Moskovsky, Alexander
AU - Mironov, Vladimir
AU - Dmello, Michael J
AU - Alexeev, Yuri
PY - 2017
DA - 2017/10/04 00:00:00
PB - SAGE
SP - 212-224
IS - 1
VL - 33
SN - 1094-3420
SN - 1741-2846
ER -
BibTex |
Cite this
BibTex Copy
@article{2017_Mironov,
author = {Alexander Moskovsky and Vladimir Mironov and Michael J Dmello and Yuri Alexeev},
title = {An efficient MPI/OpenMP parallelization of the Hartree–Fock–Roothaan method for the first generation of Intel® Xeon Phi™ processor architecture},
journal = {International Journal of High Performance Computing Applications},
year = {2017},
volume = {33},
publisher = {SAGE},
month = {oct},
url = {https://doi.org/10.1177%2F1094342017732628},
number = {1},
pages = {212--224},
doi = {10.1177/1094342017732628}
}
MLA
Cite this
MLA Copy
Mironov, Vladimir, et al. “An efficient MPI/OpenMP parallelization of the Hartree–Fock–Roothaan method for the first generation of Intel® Xeon Phi™ processor architecture.” International Journal of High Performance Computing Applications, vol. 33, no. 1, Oct. 2017, pp. 212-224. https://doi.org/10.1177%2F1094342017732628.
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