Unraveling the role of post-annealing in IGZO transistor for memory applications
Publication type: Journal Article
Publication date: 2025-06-01
scimago Q2
wos Q2
SJR: 0.539
CiteScore: 5.5
Impact factor: 3.1
ISSN: 01679317, 18735568
Abstract
We demonstrate that post-annealing techniques are important for achieving the transfer characteristics of indium‑gallium‑zinc oxide (IGZO) transistors and identify that their role depends on the sputter-deposited IGZO film conditions. The as-fabricated transistor with a thin IGZO channel, HfO2 gate dielectric, and Mo gate electrode exhibits a constant drain current (IDS) over gate voltage (VGS). Although the oxygen (O2) plasma gas rate is adjusted from 0.2 to 1 sccm with an argon gas rate of 30 sccm during IGZO deposition, the IDS level was reduced by a factor of 104. Notably, VGS-controlled transfer behavior of the transistors only starts after post-annealing is performed at temperatures above 300 °C, regardless of which IGZO channel properties are used. More specifically, since oxygen vacancies (VOs) serve as carriers in the IGZO, annealing in different O2 gas or air environments to generate or reduce the number of VOs is found to be optimal for the VO-rich or VO-poor channels, respectively. In this study, we reveal that oxidation annealing appears to be a more effective way for achieving improved gate controllability (e.g., subthreshold swing). Accordingly, we further analyze how the VOs in the IGZO are involved in switching by examining the effect of annealing temperature and gate dielectric materials on the transfer curve. These results indicate that VOs in the bulk need to be annihilated to lower the off-state IDS, while a sufficient number of VOs near the channel and gate dielectric interface should be ensured to responded by VGS for rapid switching.
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Kim N. et al. Unraveling the role of post-annealing in IGZO transistor for memory applications // Microelectronic Engineering. 2025. Vol. 298. p. 112322.
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Kim N., Jeong J., Lee J. W., Woo J. Unraveling the role of post-annealing in IGZO transistor for memory applications // Microelectronic Engineering. 2025. Vol. 298. p. 112322.
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TY - JOUR
DO - 10.1016/j.mee.2025.112322
UR - https://linkinghub.elsevier.com/retrieve/pii/S0167931725000115
TI - Unraveling the role of post-annealing in IGZO transistor for memory applications
T2 - Microelectronic Engineering
AU - Kim, Nayeon
AU - Jeong, Jiae
AU - Lee, Jae Woo
AU - Woo, Jiyong
PY - 2025
DA - 2025/06/01
PB - Elsevier
SP - 112322
VL - 298
SN - 0167-9317
SN - 1873-5568
ER -
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@article{2025_Kim,
author = {Nayeon Kim and Jiae Jeong and Jae Woo Lee and Jiyong Woo},
title = {Unraveling the role of post-annealing in IGZO transistor for memory applications},
journal = {Microelectronic Engineering},
year = {2025},
volume = {298},
publisher = {Elsevier},
month = {jun},
url = {https://linkinghub.elsevier.com/retrieve/pii/S0167931725000115},
pages = {112322},
doi = {10.1016/j.mee.2025.112322}
}