Low power active load and IMOS varactor based VCO designs using differential delay stages in 0.18 μm technology
Publication type: Journal Article
Publication date: 2020-04-01
scimago Q3
wos Q3
SJR: 0.392
CiteScore: 4.3
Impact factor: 2.3
ISSN: 09598324, 00262692, 18792391
General Engineering
Abstract
This paper proposes low power differential voltage-controlled oscillators (VCOs) with active load and IMOS varactor in delay stages. VCO circuits utilize two NOR gates in differential mode. The different levels of gate bias voltage ( V b i a s ) of the PMOS/NMOS active load along with variations in the varactor control voltage ( V c o n t r o l ) of inversion mode MOSFET (IMOS) achieves a wide frequency tuning range. PMOS active load VCO shows the output frequency range from 4.656 GHz to 5.333 GHz and power dissipation of 2.539 mW. NMOS active load VCO shows the output frequency range from 4.782 GHz to 5.516 GHz and power dissipation of 2.225 mW. The results with different width of varactor diode and bias voltages of active load are also reported in this work. Proposed VCO circuits are showing a phase noise of −102.37 dBc/Hz for PMOS active load, and −98.63 dBc/Hz for NMOS active load at 1 MHz offset with the corresponding figure of merit (FoM) of −172.86 dBc and −168.41 dBc, respectively.
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Jangra V., Sharma M. S. Low power active load and IMOS varactor based VCO designs using differential delay stages in 0.18 μm technology // Microelectronics Journal. 2020. Vol. 98. p. 104728.
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Jangra V., Sharma M. S. Low power active load and IMOS varactor based VCO designs using differential delay stages in 0.18 μm technology // Microelectronics Journal. 2020. Vol. 98. p. 104728.
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TY - JOUR
DO - 10.1016/j.mejo.2020.104728
UR - https://doi.org/10.1016/j.mejo.2020.104728
TI - Low power active load and IMOS varactor based VCO designs using differential delay stages in 0.18 μm technology
T2 - Microelectronics Journal
AU - Jangra, Vivek
AU - Sharma, Manish Singh
PY - 2020
DA - 2020/04/01
PB - Elsevier
SP - 104728
VL - 98
SN - 0959-8324
SN - 0026-2692
SN - 1879-2391
ER -
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@article{2020_Jangra,
author = {Vivek Jangra and Manish Singh Sharma},
title = {Low power active load and IMOS varactor based VCO designs using differential delay stages in 0.18 μm technology},
journal = {Microelectronics Journal},
year = {2020},
volume = {98},
publisher = {Elsevier},
month = {apr},
url = {https://doi.org/10.1016/j.mejo.2020.104728},
pages = {104728},
doi = {10.1016/j.mejo.2020.104728}
}