Hafnia and alumina stacks as UTBOXs in silicon-on insulator

• In SOI pseudo-MOSFETs with 20 nm hafnia alumina interlayers show normal gate-drain characteristics after an RTA ≥ 950 °C with the charge-carrier mobilities below the same in a thick silica BOX. • A highly stable ferroelectric hysteresis was observed in the case of SOI pseudo-MOSFETs with high oxygen vacancy concentrations in the UTBOX HfO 2 /Al 2 O 3 stack after a furnace annealing ≥ 900 °C due to the formation of the SiO x interlayers between silicon and high-k stacks. • The formation of a HfO 2 film, having ferroelectric phase OI ( Pca2 1 ), is stabilized by a compressive stress in the case of SOS pseudo-MOSFETs. PEALD-grown hafnia and alumina buried oxide (BOX) stacks in silicon-on-insulator (SOI) structures were produced and characterized by XTEM and pseudo-MOSFET techniques. The ferroelectric phases of hafnia were observed by XTEM and SAED. It was shown that the minimal interface states density (IFS) < 10 12 cm −2 and the maximal one with a memory window MW ~1 V could be obtained by the right choice of high-k dielectric layer sequence in BOX stack and thermal processing.