Superconductor Science and Technology, volume 38, issue 4, pages 45011

A high voltage and high speed superconductive voltage driver using a damped asymmetric DC SQUID array

Mengfei Zhao
Yongliang Wang
Xiaoping Gao
Pusheng Yuan
Shuna Wang
Minghui Niu
Lixing You
Jie Ren
Lingyun Li
Show full list: 9 authors
Publication typeJournal Article
Publication date2025-03-20
scimago Q1
SJR1.056
CiteScore6.8
Impact factor3.7
ISSN09532048, 13616668
Abstract

We present a non-return-to-zero (NRZ) superconductive voltage driver (SVD) for interfacing single flux quantum (SFQ) circuits with semiconductor circuits. The NRZ SVD design consists an encoding module, splitter networks, sixteen RS flip-flops (RSFFs), and a sixteen-stage DC SQUID array (DSA). By employing an asymmetric SQUID structure, the SVD achieved a simulated output swing of 4.3 mV. The impedance and quality factor formulas of the DSA were provided. We solved the issue of slower fall time caused by the asymmetric SQUID by inserting a termination resistor into the DSA to reduce its quality factor. By using this damped asymmetric DSA, the NRZ SVD can reach up to 30 Gbps in simulation. The test chip of the NRZ SVD was fabricated using the SIMIT’s Nb03P process (JC = 6 kA cm−2) and measured in a liquid helium dewar. The SVD achieved a measured output swing of up to 6.8 mV, which is relatively high compared to the published reports. Eye diagrams at 5 Gbps and 10 Gbps were clearly opened, demonstrating a very low bit error rate. The test circuit for the NRZ SVD can support up to 15 Gbps with a 2 9 1 pseudo-random bit sequence (PRBS-9) input and 20 Gbps with a sinusoidal input.

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