volume 99 issue 8 pages 85961

Design and Performance Analysis of Double Gate Vertically Stacked MoS2 Nanosheet Field Effect Transistor

Srikanth Rudravaram 1
Rajendra P Shukla 2
Satish Maheshwaram 3
Publication typeJournal Article
Publication date2024-07-18
scimago Q2
wos Q2
SJR0.388
CiteScore3.1
Impact factor2.6
ISSN00318949, 14024896
Abstract

In this work we report a vertically stacked nanosheet Field Effect Transistor (NSFET) in double gate configuration using transition metal dichalcogenide (TMD) based molybdenum disulphide (MoS2) as the conducting channel. The performance of the NSFET is analysed for number of channels, different channel thickness, different source/drain contacts. The performance of the device at different temperatures (T) also analysed. The proposed NSFET with three vertically stacked channels, exhibits a ON current (ION) of 30.6 μA μm−1, Subthreshold swing (SS) of 69 mV/dec and ON to OFF current ratio of more than 108 at Vds = 1V. Further the ION can be improved with multi-layer channel thickness. The performance of the vertically stacked MoS2 NSFET in junction less (JL) and inversion mode (IM) is compared, it is concluded from the simulations that JL vertically stacked MoS2 NSFET more immune to short channel effects such as threshold voltage (Vth) roll-off and drain induced barrier lowering (DIBL).

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Rudravaram S. et al. Design and Performance Analysis of Double Gate Vertically Stacked MoS2 Nanosheet Field Effect Transistor // Physica Scripta. 2024. Vol. 99. No. 8. p. 85961.
GOST all authors (up to 50) Copy
Rudravaram S., Shukla R. P., Maheshwaram S. Design and Performance Analysis of Double Gate Vertically Stacked MoS2 Nanosheet Field Effect Transistor // Physica Scripta. 2024. Vol. 99. No. 8. p. 85961.
RIS |
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RIS Copy
TY - JOUR
DO - 10.1088/1402-4896/ad6040
UR - https://iopscience.iop.org/article/10.1088/1402-4896/ad6040
TI - Design and Performance Analysis of Double Gate Vertically Stacked MoS2 Nanosheet Field Effect Transistor
T2 - Physica Scripta
AU - Rudravaram, Srikanth
AU - Shukla, Rajendra P
AU - Maheshwaram, Satish
PY - 2024
DA - 2024/07/18
PB - IOP Publishing
SP - 85961
IS - 8
VL - 99
SN - 0031-8949
SN - 1402-4896
ER -
BibTex |
Cite this
BibTex (up to 50 authors) Copy
@article{2024_Rudravaram,
author = {Srikanth Rudravaram and Rajendra P Shukla and Satish Maheshwaram},
title = {Design and Performance Analysis of Double Gate Vertically Stacked MoS2 Nanosheet Field Effect Transistor},
journal = {Physica Scripta},
year = {2024},
volume = {99},
publisher = {IOP Publishing},
month = {jul},
url = {https://iopscience.iop.org/article/10.1088/1402-4896/ad6040},
number = {8},
pages = {85961},
doi = {10.1088/1402-4896/ad6040}
}
MLA
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MLA Copy
Rudravaram, Srikanth, et al. “Design and Performance Analysis of Double Gate Vertically Stacked MoS2 Nanosheet Field Effect Transistor.” Physica Scripta, vol. 99, no. 8, Jul. 2024, p. 85961. https://iopscience.iop.org/article/10.1088/1402-4896/ad6040.