Impact of 1μ m TSV via-last integration on electrical performance of advanced FinFET devices

Gaspard Hiblot 1
, 
Stefaan Van Huylenbroeck 1
, 
Geert Van der Plas 1
, 
Bart De Wachter 1
, 
Adrian Chasin 1
, 
B. Kaczer 1
, 
Thomas Chiarella 1
, 
Jérôme Morio 1
, 
Steven De Muynck 1
, 
Gerald Beyer 1
, 
Eric Beyne 1
Show full list: 11 authors
1
 
Publication type: Proceedings Article
Publication date: 2018-03-01
Abstract
In this work, the impact of 1x5μm Via-last integration on an advanced bulk FinFET technology is investigated. We find that mechanical impact of TSV proximity is below detection limit, however plasma-induced damage (PID) is observed on small devices (high antenna aspect ratio). Finally, a back-side anneal raising the TSV thermal budget shows no increase of mechanical impact though it partially cures PID damage on small devices.
Found 

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