IEEE Transactions on Very Large Scale Integration (VLSI) Systems, volume 23, issue 4, pages 702-711

Randomized Multitopology Logic Against Differential Power Analysis

Moshe Avital ¹

Dagan Hadar ¹

Osnat Keren ¹

Alexander Fish ¹

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Faculty of Engineering, Bar-Ilan University, Ramat-Gan, Israel |

Publication type: Journal Article

Publication date: 2015-04-01

Institute of Electrical and Electronics Engineers (IEEE)

Journal: IEEE Transactions on Very Large Scale Integration (VLSI) Systems

SJR: 0.937

CiteScore: 6.4

Impact factor: 2.8

ISSN: 10638210, 15579999

DOI: 10.1109/tvlsi.2014.2320154

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Electrical and Electronic Engineering

Hardware and Architecture

Software

Abstract

Side channel attacks have become one of the most significant problems in modern digital systems. In particular, differential power analysis (DPA) has emerged as a powerful technique because it does not require any assumptions regarding the hardware implementation of a crypto-chip. In this paper, a new randomized multitopology logic (RMTL) is proposed to enhance immunity to DPA. RMTL refers to a family of dedicated security-oriented gates whose power profile cannot be predicted by external observers. Specifically, each gate of this logic can be configured in real time to operate in a different circuit topology, where each topology induces a different power profile. Immunity to DPA attacks is obtained by randomly changing each gate's topology on run time. The suggested approach can coexist with common existing countermeasures. Theoretical analysis and simulation results, conducted in a standard 40-nm technology, clearly show higher immunity to DPA attacks when using the proposed approach compared with standard CMOS implementation.

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Avital M. et al. Randomized Multitopology Logic Against Differential Power Analysis // IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2015. Vol. 23. No. 4. pp. 702-711.

GOST all authors (up to 50) Copy

Avital M., Hadar D., Keren O., Fish A. Randomized Multitopology Logic Against Differential Power Analysis // IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2015. Vol. 23. No. 4. pp. 702-711.

RIS |

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RIS Copy

TY - JOUR

DO - 10.1109/tvlsi.2014.2320154

UR - https://doi.org/10.1109/tvlsi.2014.2320154

TI - Randomized Multitopology Logic Against Differential Power Analysis

T2 - IEEE Transactions on Very Large Scale Integration (VLSI) Systems

AU - Avital, Moshe

AU - Hadar, Dagan

AU - Keren, Osnat

AU - Fish, Alexander

PY - 2015

DA - 2015/04/01

PB - Institute of Electrical and Electronics Engineers (IEEE)

SP - 702-711

IS - 4

VL - 23

SN - 1063-8210

SN - 1557-9999

ER -

BibTex |

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BibTex (up to 50 authors) Copy

@article{2015_Avital,

author = {Moshe Avital and Dagan Hadar and Osnat Keren and Alexander Fish},

title = {Randomized Multitopology Logic Against Differential Power Analysis},

journal = {IEEE Transactions on Very Large Scale Integration (VLSI) Systems},

year = {2015},

volume = {23},

publisher = {Institute of Electrical and Electronics Engineers (IEEE)},

month = {apr},

url = {https://doi.org/10.1109/tvlsi.2014.2320154},

number = {4},

pages = {702--711},

doi = {10.1109/tvlsi.2014.2320154}

}

MLA

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MLA Copy

Avital, Moshe, et al. “Randomized Multitopology Logic Against Differential Power Analysis.” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 23, no. 4, Apr. 2015, pp. 702-711. https://doi.org/10.1109/tvlsi.2014.2320154.

Found error?

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Journal

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

SJR

0.937

CiteScore

6.4

Impact factor

2.8

ISSN

10638210 (Print)

15579999 (Electronic)

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