A Novel Power Processing Unit (PPU) System Architecture Based on HFAC Bus for Electric Propulsion Spacecraft

This article proposes a novel power processing unit (PPU) system architecture based on the high-frequency alternating current (HFAC) bus for electric propulsion spacecraft. The proposed PPU system architecture takes the HFAC output of the inverter network in the main load power supply as the bus while supplying power for other low-power supplies. Compared with the conventional PPU system architecture, the number of transistors is significantly reduced, and the outputs of low-power supplies are regulated with nonisolated controllers, leading to a lower cost, more compact size, and higher reliability. Moreover, the redundancy design and the fault mode analysis are introduced, which greatly improve the flexibility of the fault operation strategies. Finally, the test on the electrical characteristic of the HFAC bus in the experimental prototype proves the feasibility and stability of the proposed system architecture. The obvious performance enhancement is further demonstrated through a systematic comparison with the conventional PPU system architecture.