IEEE Transactions on Multi-Scale Computing Systems, volume 1, issue 2, pages 110-122
A PUF-Enabled Secure Architecture for FPGA-Based IoT Applications
Anju P Johnson
1
,
Rajat Subhra Chakraborty
1
,
Debdeep Mukhopadhyay
1
Publication type: Journal Article
Publication date: 2015-04-01
SJR: —
CiteScore: —
Impact factor: —
ISSN: 23327766
Hardware and Architecture
Information Systems
Control and Systems Engineering
Abstract
The Internet of Things (IoT) is a dynamic, ever-evolving “living” entity. Hence, modern Field Programmable Gate Array (FPGA) devices with Dynamic Partial Reconfiguration (DPR) capabilities, which allow in-field non-invasive modifications to the circuit implemented on the FPGA, are an ideal fit. Usually, the activation of DPR capabilities requires the procurement of additional licenses from the FPGA vendor. In this work, we describe how IoTs can take advantage of the DPR capabilities of FPGAs, using a modified DPR methodology that does not require any paid “add-on” utility, to implement a lightweight cryptographic security protocol. We analyze possible threats that can emanate from the availability of DPR at IoT nodes, and propose possible solution techniques based on Physically Unclonable Function (PUF) circuits to prevent such threats.
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