Computers and Electrical Engineering, volume 110, pages 108854

Residue number systems with six modules and efficient circuits based on power-of-two diagonal modulus

Boyvalenkov P G 1
Lyakhov Pavel 2, 3
Semyonova Nataliya 2
Valueva Maria 4
Boyvalenkov Georgi 5
Minenkov D. S. 3
Publication typeJournal Article
Publication date2023-09-01
Quartile SCImago
Q1
Quartile WOS
Q2
Impact factor4.3
ISSN00457906
Electrical and Electronic Engineering
Control and Systems Engineering
General Computer Science
Abstract
The paper suggests an algorithm for finding Residue Number Systems (RNS) with six modules (6-tuples) with the Sum of Quotients SQ=2k for some positive integer k. It is shown that there are exactly thirteen such 6-tuples (m1,…,m6) with m1+m2≤10000 and m3+m4≤m5+m6≤10000 and investigated the three smallest among them, namely (5,2399,7,11,23,1691), (47,293,25,193,41,257), and (23,1433,13,29,681,821), having k=34, 36, and 40, respectively. The hypothesis is that such RNS allow efficient hardware implementations of non-modular operations — division, sign detection, comparison of numbers, and reverse conversion from the point of hardware resource usage and balancedness. The special case SQ=2k allows a significant simplification of these operations and increased efficiency of hardware implementations. Hardware modeling of circuits based on the above 6-tuples that implement magnitude comparison and reverse RNS to binary conversion (reverse conversion) is presented. The suggested magnitude comparison and reverse conversion devices, which operate with the six modules, are built using the methodology and values of the diagonal function, carry-save, and Kogge-Stone adders. The results of FPGA-based hardware modeling and the theoretical parameters of devices calculated using the unit-gate model are compared with state-of-the-art approaches. The unit-gate model showed that the use of the proposed circuits allows us to reduce the area by 17.82%–50.81% and the delay by 1.56%–97.76% for the implementation of the magnitude comparison, and to reduce the delay by 2.80%–95.03% for the implementation of reverse conversion. The FPGA synthesis also showed that the new design has reduced the area and delay by 46.96%–86.80% and 7.15%–47.65%, respectively, for the implementation of magnitude comparison and reduced the delay by 13.63%–81.53% for the implementation of reverse conversion. It is shown that a proposed technique to measure the RNS balance can adequately reflect differences in the RNS performance.
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Boyvalenkov P. G. et al. Residue number systems with six modules and efficient circuits based on power-of-two diagonal modulus // Computers and Electrical Engineering. 2023. Vol. 110. p. 108854.
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Boyvalenkov P. G., Lyakhov P., Semyonova N., Valueva M., Boyvalenkov G., Minenkov D. S., Kaplun D. Residue number systems with six modules and efficient circuits based on power-of-two diagonal modulus // Computers and Electrical Engineering. 2023. Vol. 110. p. 108854.
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TY - JOUR
DO - 10.1016/j.compeleceng.2023.108854
UR - https://doi.org/10.1016%2Fj.compeleceng.2023.108854
TI - Residue number systems with six modules and efficient circuits based on power-of-two diagonal modulus
T2 - Computers and Electrical Engineering
AU - Boyvalenkov, P G
AU - Lyakhov, Pavel
AU - Semyonova, Nataliya
AU - Valueva, Maria
AU - Boyvalenkov, Georgi
AU - Minenkov, D. S.
AU - Kaplun, Dmitrii
PY - 2023
DA - 2023/09/01 00:00:00
PB - Elsevier
SP - 108854
VL - 110
SN - 0045-7906
ER -
BibTex
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@article{2023_Boyvalenkov,
author = {P G Boyvalenkov and Pavel Lyakhov and Nataliya Semyonova and Maria Valueva and Georgi Boyvalenkov and D. S. Minenkov and Dmitrii Kaplun},
title = {Residue number systems with six modules and efficient circuits based on power-of-two diagonal modulus},
journal = {Computers and Electrical Engineering},
year = {2023},
volume = {110},
publisher = {Elsevier},
month = {sep},
url = {https://doi.org/10.1016%2Fj.compeleceng.2023.108854},
pages = {108854},
doi = {10.1016/j.compeleceng.2023.108854}
}
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