Selective area growth and stencil lithography for in situ fabricated quantum devices

The interplay of Dirac physics and induced superconductivity at the interface of a 3D topological insulator (TI) with an s-wave superconductor (S) provides a new platform for topologically protected quantum computation based on elusive Majorana modes. To employ such S–TI hybrid devices in future topological quantum computation architectures, a process is required that allows for device fabrication under ultrahigh vacuum conditions. Here, we report on the selective area growth of (Bi,Sb)2Te3 TI thin films and stencil lithography of superconductive Nb for a full in situ fabrication of S–TI hybrid devices via molecular-beam epitaxy. A dielectric capping layer was deposited as a final step to protect the delicate surfaces of the S–TI hybrids at ambient conditions. Transport experiments in as-prepared Josephson junctions show highly transparent S–TI interfaces and a missing first Shapiro step, which indicates the presence of Majorana bound states. To move from single junctions towards complex circuitry for future topological quantum computation architectures, we monolithically integrated two aligned hardmasks to the substrate prior to growth. The presented process provides new possibilities to deliberately combine delicate quantum materials in situ at the nanoscale. An in situ only fabrication process for networks of topological insulator–superconductor Josephson junctions with high interface transparency is introduced, which holds some potential for the production of future topological quantum computing networks.