IEEE Micro, volume 38, issue 1, pages 82-99

Loihi: A Neuromorphic Manycore Processor with On-Chip Learning

MIKE DAVIES 1
Narayan Srinivasa 2
Tsung-han Lin 1
Gautham Chinya 1
YONGQIANG CAO 1
Sri Harsha Choday 1
Georgios Dimou 3
Prasad Joshi 1
Nabil Imam 1
Shweta Jain 1
Yuyun Liao 1
Chit-Kwan Lin 1
Andrew Lines 1
Ruokun Liu 1
Deepak Mathaikutty 1
Steven Mccoy 1
Arnab Paul 1
Jonathan Tse 1
Guruguhanathan Venkataramanan 1
Yi-Hsin Weng 1
Andreas Wild 1
Yoonseok Yang 1
Hong Wang 1
1
 
Intel Labs, Intel Corporation
2
 
Eta Compute
3
 
Reduced Energy Microsystems
Publication typeJournal Article
Publication date2018-01-16
Journal: IEEE Micro
Q1
Q2
SJR1.145
CiteScore7.5
Impact factor2.8
ISSN02721732, 19374143
Electrical and Electronic Engineering
Hardware and Architecture
Software
Abstract
Loihi is a 60-mm2 chip fabricated in Intels 14-nm process that advances the state-of-the-art modeling of spiking neural networks in silicon. It integrates a wide range of novel features for the field, such as hierarchical connectivity, dendritic compartments, synaptic delays, and, most importantly, programmable synaptic learning rules. Running a spiking convolutional form of the Locally Competitive Algorithm, Loihi can solve LASSO optimization problems with over three orders of magnitude superior energy-delay-product compared to conventional solvers running on a CPU iso-process/voltage/area. This provides an unambiguous example of spike-based computation, outperforming all known conventional solutions.

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Cite this
GOST |
Cite this
GOST Copy
DAVIES M. et al. Loihi: A Neuromorphic Manycore Processor with On-Chip Learning // IEEE Micro. 2018. Vol. 38. No. 1. pp. 82-99.
GOST all authors (up to 50) Copy
DAVIES M., Srinivasa N., Lin T., Chinya G., CAO Y., Choday S. H., Dimou G., Joshi P., Imam N., Jain S., Liao Y., Lin C., Lines A., Liu R., Mathaikutty D., Mccoy S., Paul A., Tse J., Venkataramanan G., Weng Y., Wild A., Yang Y., Wang H. Loihi: A Neuromorphic Manycore Processor with On-Chip Learning // IEEE Micro. 2018. Vol. 38. No. 1. pp. 82-99.
RIS |
Cite this
RIS Copy
TY - JOUR
DO - 10.1109/MM.2018.112130359
UR - https://doi.org/10.1109/MM.2018.112130359
TI - Loihi: A Neuromorphic Manycore Processor with On-Chip Learning
T2 - IEEE Micro
AU - DAVIES, MIKE
AU - Srinivasa, Narayan
AU - Lin, Tsung-han
AU - Chinya, Gautham
AU - CAO, YONGQIANG
AU - Choday, Sri Harsha
AU - Dimou, Georgios
AU - Joshi, Prasad
AU - Imam, Nabil
AU - Jain, Shweta
AU - Liao, Yuyun
AU - Lin, Chit-Kwan
AU - Lines, Andrew
AU - Liu, Ruokun
AU - Mathaikutty, Deepak
AU - Mccoy, Steven
AU - Paul, Arnab
AU - Tse, Jonathan
AU - Venkataramanan, Guruguhanathan
AU - Weng, Yi-Hsin
AU - Wild, Andreas
AU - Yang, Yoonseok
AU - Wang, Hong
PY - 2018
DA - 2018/01/16
PB - Institute of Electrical and Electronics Engineers (IEEE)
SP - 82-99
IS - 1
VL - 38
SN - 0272-1732
SN - 1937-4143
ER -
BibTex |
Cite this
BibTex (up to 50 authors) Copy
@article{2018_DAVIES,
author = {MIKE DAVIES and Narayan Srinivasa and Tsung-han Lin and Gautham Chinya and YONGQIANG CAO and Sri Harsha Choday and Georgios Dimou and Prasad Joshi and Nabil Imam and Shweta Jain and Yuyun Liao and Chit-Kwan Lin and Andrew Lines and Ruokun Liu and Deepak Mathaikutty and Steven Mccoy and Arnab Paul and Jonathan Tse and Guruguhanathan Venkataramanan and Yi-Hsin Weng and Andreas Wild and Yoonseok Yang and Hong Wang},
title = {Loihi: A Neuromorphic Manycore Processor with On-Chip Learning},
journal = {IEEE Micro},
year = {2018},
volume = {38},
publisher = {Institute of Electrical and Electronics Engineers (IEEE)},
month = {jan},
url = {https://doi.org/10.1109/MM.2018.112130359},
number = {1},
pages = {82--99},
doi = {10.1109/MM.2018.112130359}
}
MLA
Cite this
MLA Copy
DAVIES, MIKE, et al. “Loihi: A Neuromorphic Manycore Processor with On-Chip Learning.” IEEE Micro, vol. 38, no. 1, Jan. 2018, pp. 82-99. https://doi.org/10.1109/MM.2018.112130359.
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