Efficient Processing of Deep Neural Networks
3
Publication type: Journal Article
Publication date: 2020-06-16
scimago Q4
SJR: 0.179
CiteScore: 1.6
Impact factor: —
ISSN: 19353235, 19353243
Hardware and Architecture
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Metrics
95
Total citations:
95
Citations from 2024:
24
(25.27%)
The most citing journal
Citations in journal:
6
Cite this
GOST |
RIS |
BibTex |
MLA
Cite this
GOST
Copy
Sze V. et al. Efficient Processing of Deep Neural Networks // Synthesis Lectures on Computer Architecture. 2020. Vol. 15. No. 2. pp. 1-341.
GOST all authors (up to 50)
Copy
Sze V., Chen Y., Yang T. J., Emer J. S. Efficient Processing of Deep Neural Networks // Synthesis Lectures on Computer Architecture. 2020. Vol. 15. No. 2. pp. 1-341.
Cite this
RIS
Copy
TY - JOUR
DO - 10.2200/s01004ed1v01y202004cac050
UR - https://doi.org/10.2200/s01004ed1v01y202004cac050
TI - Efficient Processing of Deep Neural Networks
T2 - Synthesis Lectures on Computer Architecture
AU - Sze, Vivienne
AU - Chen, Yu-Hsin
AU - Yang, Tien Ju
AU - Emer, Joel S.
PY - 2020
DA - 2020/06/16
PB - Morgan & Claypool Publishers
SP - 1-341
IS - 2
VL - 15
SN - 1935-3235
SN - 1935-3243
ER -
Cite this
BibTex (up to 50 authors)
Copy
@article{2020_Sze,
author = {Vivienne Sze and Yu-Hsin Chen and Tien Ju Yang and Joel S. Emer},
title = {Efficient Processing of Deep Neural Networks},
journal = {Synthesis Lectures on Computer Architecture},
year = {2020},
volume = {15},
publisher = {Morgan & Claypool Publishers},
month = {jun},
url = {https://doi.org/10.2200/s01004ed1v01y202004cac050},
number = {2},
pages = {1--341},
doi = {10.2200/s01004ed1v01y202004cac050}
}
Cite this
MLA
Copy
Sze, Vivienne, et al. “Efficient Processing of Deep Neural Networks.” Synthesis Lectures on Computer Architecture, vol. 15, no. 2, Jun. 2020, pp. 1-341. https://doi.org/10.2200/s01004ed1v01y202004cac050.