Plasticity in memristive devices for spiking neural networks

Mayr C., Partzsch J., Noack M., Hanzsche S., Scholze S., Hoppner S., Ellguth G., Schuffny R.

A switched-capacitor (SC) neuromorphic system for closed-loop neural coupling in 28 nm CMOS is presented, occupying 600 um by 600 um. It offers 128 input channels (i.e., presynaptic terminals), 8192 synapses and 64 output channels (i.e., neurons). Biologically realistic neuron and synapse dynamics are achieved via a faithful translation of the behavioural equations to SC circuits. As leakage currents significantly affect circuit behaviour at this technology node, dedicated compensation techniques are employed to achieve biological-realtime operation, with faithful reproduction of time constants of several 100 ms at room temperature. Power draw of the overall system is 1.9 mW.

Vincent A.F., Locatelli N., Klein J., Zhao W.S., Galdin-Retailleau S., Querlioz D.

Owing to their nonvolatility, outstanding endurance, high write and read speeds, and CMOS process compatibility, spin-transfer torque magnetoresistive memories (MRAMs) are prime candidates for innovative memory applications. However, the switching delay of their core components-the magnetic tunnel junctions (MTJs)-is a stochastic quantity. To account for this in electronic design, only partial models (working in extreme regimes) are available. In this paper, we propose an analytical model for the stochastic switching delay of a current-driven MTJ, with in-plane magnetization, that agrees with physical simulations, from low- to high-current regimes through intermediate regime. We performed physical macrospin simulations of MTJs for a wide range of current. We developed an analytical model for the mean switching delay that fits those simulations results, and smoothly connects well-accepted models for the extreme low and extreme high currents limits. In addition, a probability distribution in agreement with our simulations results is proposed, leading to a full model of the stochastic switching delay. An example for the application of the model is proposed. Our analytical model can help to evaluate the error rate in MRAM designs, and allow designing innovative electronic circuits that exploit the intrinsic stochastic behavior of MTJs as a beneficial feature.

You T., Du N., Slesazeck S., Mikolajick T., Li G., Bürger D., Skorupa I., Stöcker H., Abendroth B., Beyer A., Volz K., Schmidt O.G., Schmidt H.

Pulsed laser deposited Au-BFO-Pt/Ti/Sapphire MIM structures offer excellent bipolar resistive switching performance, including electroforming free, long retention time at 358 K, and highly stable endurance. Here we develop a model on modifiable Schottky barrier heights and elucidate the physical origin underlying resistive switching in BiFeO3 memristors containing mobile oxygen vacancies. Increased switching speed is possible by applying a large amplitude writing pulse as the resistive switching is tunable by both the amplitude and length of the writing pulse. The local resistive switching has been investigated by conductive atomic force microscopy and exhibits the capability of down-scaling the resistive switching cell to the grain size.

Kornijcuk V., Kavehei O., Lim H., Seok J.Y., Kim S.K., Kim I., Lee W., Choi B.J., Jeong D.S.

We suggest a 'universal' electrical circuit for the realization of an artificial synapse that exhibits long-term plasticity induced by different protocols. The long-term plasticity of the artificial synapse is basically attributed to the nonvolatile resistance change of the bipolar resistive switch in the circuit. The synaptic behaviour realized by the circuit is termed 'universal' inasmuch as (i) the shape of the action potential is not required to vary so as to implement different plasticity-induction behaviours, activity-dependent plasticity (ADP) and spike-timing-dependent plasticity (STDP), (ii) the behaviours satisfy several essential features of a biological chemical synapse including firing-rate and spike-timing encoding and unidirectional synaptic transmission, and (iii) both excitatory and inhibitory synapses can be realized using the same circuit but different diode polarity in the circuit. The feasibility of the suggested circuit as an artificial synapse is demonstrated by conducting circuit calculations and the calculation results are introduced in comparison with biological chemical synapses.

Chua L.

This chapter consists of two parts. Part I gives a circuit-theoretic foundation for the first four elementary nonlinear 2-terminal circuit elements, namely, the resistor, the capacitor, the inductor, and the memristor. Part II consists of a collection of colorful “Vignettes” with carefully articulated text and colorful illustrations of the rudiments of the memristor and its characteristic fingerprints and signatures. It is intended as a self-contained pedagogical primer for beginners who have not heard of memristors before.

Fukushima A., Seki T., Yakushiji K., Kubota H., Imamura H., Yuasa S., Ando K.

Generation of practical random numbers (RNs) by a spintronics-based, scalable truly RN generator called "spin dice" was demonstrated. The generator utilizes the stochastic nature of spin-torque switching in a magnetic tunnel junction (MTJ) to generate RNs. We fabricated eight perpendicularly magnetized MTJs on a single-board circuit and generated eight sequences of RNs simultaneously. The sequences of RNs of different MTJs were not correlated with each other, and performing an exclusive OR (XOR) operation among them improved the quality of the RNs. The RNs obtained by performing a nested XOR operation passed the statistical test of NIST SP-800 with the appropriate pass rate.

Mayr C.G., Partzsch J., Noack M., Schüffny R.

Efficient Analog-Digital Converters (ADC) are one of the mainstays of mixed-signal integrated circuit design. Besides the conventional ADCs used in mainstream ICs, there have been various attempts in the past to utilize neuromorphic networks to accomplish an efficient crossing between analog and digital domains, i.e. to build neurally inspired ADCs. Generally, these have suffered from the same problems as conventional ADCs, that is they require high-precision, handcrafted analog circuits and are thus not technology portable. In this paper, we present an ADC based on the Neural Engineering Framework (NEF). It carries out a large fraction of the overall ADC process in the digital domain, i.e. it is easily portable across technologies. The analog-digital conversion takes full advantage of the high degree of parallelism inherent in neuromorphic networks, making for a very scalable ADC. In addition, it has a number of features not commonly found in conventional ADCs, such as a runtime reconfigurability of the ADC sampling rate, resolution and transfer characteristic.

Kavehei O., Skafidas E.

Thermodynamic-driven filament formation in redox-based resistive memory and the impact of thermal fluctuation on switching probability of emerging magnetic memory are probabilistic phenomena in nature. Therefore, process of binary switching in these nonvolatile memories are considered stochastic that varies from switching-to-switching. Moreover, position-dependent, spatially correlated, and distance-dependent variation in these electron devices, like advanced CMOS processes, provide rich in-situ spatiotemporal stochastic characteristics. Based on a partial characterization of the switching variation, this preliminary work presents highly scalable neuromorphic hardware based on crossbar array of 1-bit resistive elements as distributed stochastic synapses. The network shows the ability to emulate selectivity of synaptic potentials in neurons of primary visual cortex to the orientation of a visual image. The proposed model could be configured to accept a wide range of emerging non-volatile memory technologies.

Josberger E.E., Deng Y., Sun W., Kautz R., Rolandi M.

Two-terminal protonic devices with PdHx proton conducting contacts and a Nafion channel achieve 25 ms spiking, short term depression, and low-energy memory switching.

Boyn S., Girod S., Garcia V., Fusil S., Xavier S., Deranlot C., Yamada H., Carrétéro C., Jacquet E., Bibes M., Barthélémy A., Grollier J.

In tunnel junctions with ferroelectric barriers, switching the polarization direction modifies the electrostatic potential profile and the associated average tunnel barrier height. This results in strong changes of the tunnel transmission and associated resistance. The information readout in ferroelectric tunnel junctions (FTJs) is thus resistive and non-destructive, which is an advantage compared to the case of conventional ferroelectric memories (FeRAMs). Initially, endurance limitation (i.e., fatigue) was the main factor hampering the industrialization of FeRAMs. Systematic investigations of switching dynamics for various ferroelectric and electrode materials have resolved this issue, with endurance now reaching 1014 cycles. Here we investigate data retention and endurance in fully patterned submicron Co/BiFeO3/Ca0.96Ce0.04MnO3 FTJs. We report good reproducibility with high resistance contrasts and extend the maximum reported endurance of FTJs by three orders of magnitude (4 × 106 cycles). Our results indicate that here fatigue is not limited by a decrease of the polarization or an increase of the leakage but rather by domain wall pinning. We propose directions to access extreme and intermediate resistance states more reliably and further strengthen the potential of FTJs for non-volatile memory applications.

Yu S., Gao B., Fang Z., Yu H., Kang J., Wong H.-.

Hardware implementation of neuromorphic computing is attractive as a computing paradigm beyond the conventional digital computing. In this work, we show that the SET (off-to-on) transition of metal oxide resistance switching memory becomes probabilistic under a weak programming condition. The switching variability of the binary synaptic device implements a stochastic learning rule. Such stochastic SET transition was statistically measured and modeled for a simulation of a winner-take-all network for competitive learning. The simulation illustrates that with such stochastic learning, the orientation classification function of input patterns can be effectively realized. The system performance metrics were compared between the conventional approach using the analog synapse and the approach in this work that employs the binary synapse utilizing the stochastic learning. The feasibility of using binary synapse in the neurormorphic computing may relax the constraints to engineer continuous multilevel intermediate states and widens the material choice for the synaptic device design.

Lim H., Kim I., Kim J., Seong Hwang C., Jeong D.S.

Chemical synapses are important components of the large-scaled neural network in the hippocampus of the mammalian brain, and a change in their weight is thought to be in charge of learning and memory. Thus, the realization of artificial chemical synapses is of crucial importance in achieving artificial neural networks emulating the brain's functionalities to some extent. This kind of research is often referred to as neuromorphic engineering. In this study, we report short-term memory behaviours of electrochemical capacitors (ECs) utilizing TiO2 mixed ionic-electronic conductor and various reactive electrode materials e.g. Ti, Ni, and Cr. By experiments, it turned out that the potentiation behaviours did not represent unlimited growth of synaptic weight. Instead, the behaviours exhibited limited synaptic weight growth that can be understood by means of an empirical equation similar to the Bienenstock-Cooper-Munro rule, employing a sliding threshold. The observed potentiation behaviours were analysed using the empirical equation and the differences between the different ECs were parameterized.

Kuzum D., Yu S., Philip Wong H.

In this paper, the recent progress of synaptic electronics is reviewed. The basics of biological synaptic plasticity and learning are described. The material properties and electrical switching characteristics of a variety of synaptic devices are discussed, with a focus on the use of synaptic devices for neuromorphic or brain-inspired computing. Performance metrics desirable for large-scale implementations of synaptic devices are illustrated. A review of recent work on targeted computing applications with synaptic devices is presented.

Yang R., Terabe K., Yao Y., Tsuruoka T., Hasegawa T., Gimzewski J.K., Aono M.

A compact neuromorphic nanodevice with inherent learning and memory properties emulating those of biological synapses is the key to developing artificial neural networks rivaling their biological counterparts. Experimental results showed that memorization with a wide time scale from volatile to permanent can be achieved in a WO3−x-based nanoionics device and can be precisely and cumulatively controlled by adjusting the device’s resistance state and input pulse parameters such as the amplitude, interval, and number. This control is analogous to biological synaptic plasticity including short-term plasticity, long-term potentiation, transition from short-term memory to long-term memory, forgetting processes for short- and long-term memory, learning speed, and learning history. A compact WO3−x-based nanoionics device with a simple stacked layer structure should thus be a promising candidate for use as an inorganic synapse in artificial neural networks due to its striking resemblance to the biological synapse.

Suri M., Querlioz D., Bichler O., Palma G., Vianello E., Vuillaume D., Gamrat C., DeSalvo B.

In this paper, we present an alternative approach to neuromorphic systems based on multilevel resistive memory synapses and deterministic learning rules. We demonstrate an original methodology to use conductive-bridge RAM (CBRAM) devices as, easy to program and low-power, binary synapses with stochastic learning rules. New circuit architecture, programming strategy, and probabilistic spike-timing dependent plasticity (STDP) learning rule for two different CBRAM configurations with-selector (1T-1R) and without-selector (1R) are proposed. We show two methods (intrinsic and extrinsic) for implementing probabilistic STDP rules. Fully unsupervised learning with binary synapses is illustrated through two example applications: 1) real-time auditory pattern extraction (inspired from a 64-channel silicon cochlea emulator); and 2) visual pattern extraction (inspired from the processing inside visual cortex). High accuracy (audio pattern sensitivity > 2, video detection rate > 95%) and low synaptic-power dissipation (audio 0.55 μW, video 74.2 μW) are shown. The robustness and impact of synaptic parameter variability on system performance are also analyzed.

Park S., Park S., Kim S.

Maryada, De Luca C., Rubino A., Wen C., Cartiglia M., Fodorut I., Payvand M., Indiveri G.

AbstractCortical microcircuits play a fundamental role in natural intelligence. While they inspired a wide range neural computation models and artificial intelligence algorithms, few attempts have been made to directly emulate them with an electronic computational substrate that uses the same physics of computation. Here we present a heterogeneous canonical microcircuit architecture compatible with analog neuromorphic electronic circuits that faithfully reproduce the properties of real synapses and neurons. The architecture comprises populations of interacting excitatory and inhibitory neurons, disinhibition pathways, and spike-driven multi-compartment dendritic learning mechanisms. By co-designing the computational model with its neuromorphic hardware implementation, we developed a neural processing system that can perform complex signal processing functions, learning, and classification tasks robustly and reliably, despite the inherent variability of the analog circuits, using ultra-low power energy consumption features comparable to those of their biological counterparts. We demonstrate how both the model architecture and its hardware implementation seamlessly capture the hallmarks of neural computation: attractor dynamics, adaptation, winner-take-all behavior, and resilience to variability, within a compact, low-power computing substrate. We validate the model’s learning performance both from the algorithmic perspective and with detailed electronic circuit simulation experiments and characterize its robustness to noise. Our results illustrate how local, biologically plausible rules for plasticity and gating can overcome challenges like catastrophic forgetting and parameter variability, enabling effective always-on adaptation. Beyond offering insights into the nature of computation in neural systems, our approach introduces a foundation for ultra-low power, fault-tolerant architectures capable of complex signal processing at the edge. By embracing -rather than mitigating-variability, these neuromorphic circuits exhibit a powerful synergy with emerging memory technologies, suggesting a new paradigm for sophisticated “in-memory” computing. Through such tight integration of neuroscience principles and analog circuit design, we pave the way toward a class of brain-inspired processors that can learn continuously and respond dynamically to real-world inputs.

Fullerton-Shirey S., Xu K.

Abstract Neuromorphic computing is a low-power and energy efficient alternative to von Neumann computing that demands new materials and computing architectures. Two-dimensional (2D) van der Waals materials and ions are a particularly favorable pair for neuromorphic computing. The large surface to volume ratio of 2D layered materials makes them sensitive to the presence of ions, detected as orders of magnitude change in electrical resistance. Quantum confinement of 2D crystals limits carrier scattering and enhances mobility, which decreases power consumption. Moreover, the 2D crystal-ion pair can provide volatile and non-volatile responses in the same device, as well as dynamic synaptic properties, such as spike-timing dependent plasticity (STDP). These dynamic properties are particularly relevant because they mirror the mechanisms involved in biological learning and memory. In this perspective, we first summarize recent progress in the field, categorize 2D crystal-ion devices in terms of their mechanisms (either electrostatic or electrochemical), and highlight key synaptic functionalities these devices can replicate. We underscore the differences between artificial and biological synapses, and between devices meant to emulate biological functions versus those optimized for compatibility with digital artificial neural networks (ANNs). We note that the use of ionically gated transistors based on 2D crystals (2D IGTs) in ANNs has primarily focused on their non-volatile memory functions, rather than fully exploiting their dynamic synaptic properties. We assert that the energy-efficient operation of ionically gated transistors based on 2D crystals, enabled by their high capacitance density and tunable ion dynamics, makes them particularly suited for low-power edge computing applications. Finally, our perspective is that realizing the full potential of 2D crystals and ions in neuromorphic systems will require bridging the gap between demonstrated synaptic functionalities and their practical implementations in neural networks.

Wang Y., Zhang L., Luo R., Lu Y., Fang B., Zeng Z.

Harumoto T., Fujiki H., Sutou Y., Shi J.

Erokhin V.

This chapter is dedicated to the description of memristive (resistive switching) devices. In the first section we consider historical aspects of the development of these kinds of devices. In the second section we discuss the main materials used for the fabrication of these elements, together with techniques for their fabrication. In the third section we provide an overview of their applications mainly for the realization of neuromorphic systems, such as artificial neuron networks, learning algorithms, and coupling with live neurons, just mentioning traditional applications in the field of resistive memory. A summary of the state of the art in the field and possible lines of future development are presented in the Conclusions section.

Schegolev Andrey E., Bastrakova Marina V., Sergeev Michael A., Maksimovskaya Anastasia A., Klenov Nikolay V., Soloviev Igor

The extensive development of the field of spiking neural networks has led to many areas of research that have a direct impact on people’s lives. As the most bio-similar of all neural networks, spiking neural networks not only allow for the solution of recognition and clustering problems (including dynamics), but they also contribute to the growing understanding of the human nervous system. Our analysis has shown that hardware implementation is of great importance, since the specifics of the physical processes in the network cells affect their ability to simulate the neural activity of living neural tissue, the efficiency of certain stages of information processing, storage and transmission. This survey reviews existing hardware neuromorphic implementations of bio-inspired spiking networks in the ”semiconductor”, ”superconductor”, and ”optical” domains. Special attention is given to the potentials for effective ”hybrids” of different approaches.

Muni S.S.

Paulin J.V., Bufon C.C.

With traditional medical technologies shifting towards a more personalized point-of-view, current semiconductor-based electronics may need high-performance computing capability for cognitive and adaptive functions based on unspecific, multi-input, and complex tasks....

Garg N., Florini D., Dufour P., Muhr E., Faye M.C., Bocquet M., Querlioz D., Beilliard Y., Drouin D., Alibart F., Portal J.

Goupy G., Tirilly P., Bilasco I.M.

Direct training of Spiking Neural Networks (SNNs) on neuromorphic hardware has the potential to significantly reduce the energy consumption of artificial neural network training. SNNs trained with Spike Timing-Dependent Plasticity (STDP) benefit from gradient-free and unsupervised local learning, which can be easily implemented on ultra-low-power neuromorphic hardware. However, classification tasks cannot be performed solely with unsupervised STDP. In this paper, we propose Stabilized Supervised STDP (S2-STDP), a supervised STDP learning rule to train the classification layer of an SNN equipped with unsupervised STDP for feature extraction. S2-STDP integrates error-modulated weight updates that align neuron spikes with desired timestamps derived from the average firing time within the layer. Then, we introduce a training architecture called Paired Competing Neurons (PCN) to further enhance the learning capabilities of our classification layer trained with S2-STDP. PCN associates each class with paired neurons and encourages neuron specialization toward target or non-target samples through intra-class competition. We evaluate our methods on image recognition datasets, including MNIST, Fashion-MNIST, and CIFAR-10. Results show that our methods outperform state-of-the-art supervised STDP learning rules, for comparable architectures and numbers of neurons. Further analysis demonstrates that the use of PCN enhances the performance of S2-STDP, regardless of the hyperparameter set and without introducing any additional hyperparameters.

Jana R., Ghosh S., Bhunia R., Chowdhury A.

This review showcases the diverse functionalities of 2D materials and state-of-the-art developments in device structures, working principles, design strategies of materials, and the integration of 2D material-based optoelectronic synaptic devices.

Sboev A., Balykov M., Kunitsyn D., Serenko A.

The paper evaluates the applicability of an approach based on the usage of a spiking neural network with synaptic weights fixed from a uniform random distribution to solving audio data classification problems. On the example of the Free Spoken Digits Dataset pronounceable digit classification problem using a linear classifier trained on the output frequencies of spiking neurons as a decoder, an average accuracy of 94% was obtained. This shows that the proposed spiking neural network performs such a transformation of the audio data that makes it linearly separable. Numerical experiments demonstrated the stability of the algorithm to the parameters of the spike layer, and it was shown that the constants of the threshold potential and the membrane leakage time can be both equal and different for different neurons.

Rybka R., Davydov Y., Sboev A., Vlasov D., Serenko A.

Spiking neural networks (SNNs) are potentially capable of greatly reducing the energy requirements of modern intelligent systems when combined with neuromorphic computing devices based on memristors, that facilitate on-chip SNN training. Currently, the existing spiking approaches either rely on weight transfer and/or backpropagation-based training or utilize large fully-connected spiking networks, imposing high hardware requirements. In this paper, we study the application of the bagging ensembling technique coupled with SNN-based models to the audio and image classification problems. In our experiments, we use a three-layer spiking neural network with Logistic Regression decoding and consider three local plasticity rules—spike time-dependent plasticity and its nanocomposite and poly-p-xylylene memristor counterparts. Using the Digits and FSDD datasets for training and evaluation, we show that bagging yields a performance increase of up to 20% in terms of the F1-score metric, while substantially reducing the total number of connections in the network.

Miyata N.

In the pursuit of energy-efficient spiking neural network (SNN) hardware, synaptic devices leveraging emerging memory technologies hold significant promise. This study investigates the application of the recently proposed HfO2/SiO2-based interface dipole modulation (IDM) memory for synaptic spike timing-dependent plasticity (STDP) learning. Firstly, through pulse measurements of IDM metal–oxide–semiconductor (MOS) capacitors, we demonstrate that IDM exhibits an inherently nonlinear and near-symmetric response. Secondly, we discuss the drain current response of a field-effect transistor (FET) incorporating a multi-stack IDM structure, revealing its nonlinear and asymmetric pulse response, and suggest that the degree of the asymmetry depends on the modulation current ratio. Thirdly, to emulate synaptic STDP behavior, we implement double-pulse-controlled drain current modulation of IDMFET using a simple bipolar rectangular pulse. Additionally, we propose a double-pulse-controlled synaptic depression that is valuable for optimizing STDP-based unsupervised learning. Integrating the pulse response characteristics of IDMFETs into a two-layer SNN system for synaptic weight updates, we assess training and classification performance on handwritten digits. Our results demonstrate that IDMFET-based synaptic devices can achieve classification accuracy comparable to previously reported simulation-based results.