Open Access
Open access
Materials, volume 18, issue 1, pages 12

The Overview of Silicon Carbide Technology: Status, Challenges, Key Drivers, and Product Roadmap

Maciej Kaminski 1, 2
Krystian Król 1
Norbert Kwietniewski 1
Marcin Myśliwiec 1, 3
Mariusz Sochacki 1
Bartłomiej Stonio 1, 3
R Kisiel 1
Agnieszka Martychowiec 1
Katarzyna Racka-Szmidt 2
Aleksander Werbowy 1
Jarosław Żelazko 2
Jan Szmidt 1
Andrzej Strójwąs 5, 6
Show full list: 14 authors
Publication typeJournal Article
Publication date2024-12-24
Journal: Materials
scimago Q2
SJR0.565
CiteScore5.8
Impact factor3.1
ISSN19961944
Abstract

Arguably, SiC technology is the most rapidly expanding IC manufacturing technology driven mostly by the aggressive roadmap for battery electric vehicle penetration and also industrial high-voltage/high-power applications. This paper provides a comprehensive overview of the state of the art of SiC technology focusing on the challenges starting from the difficult and lengthy SiC substrate growth all the way to the complex MOSFET assembly processes. We focus on the differentiation from the established Si manufacturing processes and provide a comprehensive list of references as well as a brief description of our own research into the key manufacturing processes in this technology. We also present a SiC technology and product roadmap.

Hidaka A., Kondo Y., Takeshita A., Matsuura H., Eto K., Ji S., Kojima K., KATO T., Yoshida S., Okumura H.
2023-10-01 citations by CoLab: 4 Abstract  
Abstract The temperature-dependent resistivity of heavily Al- and N-codoped 4H-SiC grown by physical vapor transport (PVT) with Al concentrations (C Al) higher than 1019 cm−3 is investigated to obtain high-growth-rate and low-cost p+-type substrates suitable for the collectors of n-channel insulated-gate bipolar transistors. The resistivity is compared with that of heavily Al-doped 4H-SiC grown by CVD. In the band conduction region, the hole mobility of the PVT-grown codoped samples is slightly lower than that of the CVD-grown sample at the same C Al. At C Al values of around 2 × 1020 cm−3, the temperature range in the variable-range-hopping conduction region for the PVT-grown codoped samples is much wider than that for the CVD-grown samples.
Matsuura H., Hidaka A., Ji S., Eto K., Ishida Y., Yoshida S.
Journal of Applied Physics scimago Q2 wos Q2
2023-09-15 citations by CoLab: 2 Abstract  
At low temperatures, the Hall coefficients in heavily Al-doped 4H-SiC are reported to be negative in the band conduction region as well as in the hopping conduction regions (i.e., nearest-neighbor hopping conduction region and variable-range hopping conduction region). A physical model was proposed to explain the negative sign of RH(T) in the hopping conduction regions. However, the negative value of RH(T) in the conduction band region remains unexplained. This study proposed a physical model to explain the negative value of RH(T) in the conduction band region. In addition to the valence band, doping copious amounts of Al acceptors in 4H-SiC causes a strong overlap of the wave functions of the excited states of Al acceptors, which results in the formation of allowed bands, referred to as allowed minibands. Although the holes can flow freely through the valence band as well as the allowed minibands, the energy–momentum relationship in the valence band and the allowed minibands determines the sign of RH(T). As elucidated here, if the holes flow primarily in the lower parts of the allowed minibands, the RH(T) in the band conduction region becomes negative, whereas if the holes flow primarily in the upper parts of the allowed minibands and the valence band, the RH(T) becomes positive.
Brzozowski E., Kaminski M., Taube A., Sadowski O., Krol K., Guziewicz M.
Materials scimago Q2 wos Q2 Open Access
2023-06-14 citations by CoLab: 7 PDF Abstract  
The electrical and physical properties of the SiC/SiO2 interfaces are critical for the reliability and performance of SiC-based MOSFETs. Optimizing the oxidation and post-oxidation processes is the most promising method of improving oxide quality, channel mobility, and thus the series resistance of the MOSFET. In this work, we analyze the effects of the POCl3 annealing and NO annealing processes on the electrical properties of metal–oxide–semiconductor (MOS) devices formed on 4H-SiC (0001). It is shown that combined annealing processes can result in both low interface trap density (Dit), which is crucial for oxide application in SiC power electronics, and high dielectric breakdown voltage comparable with those obtained via thermal oxidation in pure O2. Comparative results of non-annealed, NO-annealed, and POCl3-annealed oxide–semiconductor structures are shown. POCl3 annealing reduces the interface state density more effectively than the well-established NO annealing processes. The result of 2 × 1011 cm−2 for the interface trap density was attained for a sequence of the two-step annealing process in POCl3 and next in NO atmospheres. The obtained values Dit are comparable to the best results for the SiO2/4H-SiC structures recognized in the literature, while the dielectric critical field was measured at a level ≥9 MVcm−1 with low leakage currents at high fields. Dielectrics, which were developed in this study, have been used to fabricate the 4H-SiC MOSFET transistors successfully.
Kato M., Di J., Ohkouchi Y., Mizuno T., Ichimura M., Kojima K.
Materials Today Communications scimago Q2 wos Q2
2022-06-01 citations by CoLab: 5 Abstract  
We performed current deep level transient spectroscopy (I-DLTS) on Al-doped p-type 4H-SiC epilayers. The epilayers exhibited a peak at 100–120 K in the I-DLTS spectra. The correspondence of the deep-level concentrations with the net acceptor concentration implies that the peak originates from the Al acceptor level. The observed activation energy of the peak was low compared to the Al acceptor level reported by Hall measurements owing to the Poole-Frenkel effect. We estimated capture cross section σ for holes of the Al acceptor level at the peak temperature based on the I-DLTS peak height dependence on the injection pulse widths and analyzed the temperature dependence of σ for holes. • We performed current deep level transient spectroscopy (I-DLTS) on Al-doped 4H-SiC. • We observed I-DLTS peaks due to the Al acceptor level. • We analyzed the hole capture cross section of the Al acceptor level at low temperature.
Chen C., Kim D., Zhang Z., Wakasugi N., Liu Y., Hsieh M., Zhao S., Suetake A., Suganuma K.
2022-06-01 citations by CoLab: 24 Abstract  
In this article, an SiC die was directly attached on a bare DBA (Al/AlN/Al) substrate via micron-sized Ag sintering at 250 °C without pressure. The micron-sized structure of the Ag–Al joint revealed robust bonding (33.6 MPa), which was attributed to the excellent sinterability of the Ag paste. A high-temperature storage test was conducted for 1000 h at 250 °C, and the thermal shock test was conducted from −50 to 250 °C for 2000 cycles. The shear strength was >30 MPa even after 1000 h of high-temperature storage. Furthermore, the online thermal resistance (R th ) of the direct bonding of SiC–DBA was measured during the power cycling test employing an n-doped 4 H-SiC thermal engineering group (TEG) chip. The SiC–TEG chip exhibited ultra-high power density (1200 W/cm 2 ) and ensured that the junction temperature reached 200 °C. The total R th increased from 0.58 to 0.7 K/W after 10 000 power cycles at a swing temperature, ΔTj, of 175 °C, indicating that the increase in the R th was 20.7% at such a large power density. The results revealed that the SiC–DBA power module structure exhibited very good bonding and thermal-resistance reliability, which can be employed as a new structure for next-generation SiC power modules.
Mletschnig K.L., Rommel M., Pobegen G., Schustereder W., Pichler P.
2022-05-31 citations by CoLab: 1 Abstract  
The excellent material properties of the wide band gap semiconductor SiC are accompanied by challenges in device processing. Of particular importance is the incomplete activation of implanted Al acceptors after high-temperature annealing. In this work, we present a novel approach in applying the differential-capacitance method to lateral MOS capacitors, where systematic errors in its characterization are reduced by introducing a buried current-spreading layer. We find that the implantation of an additional current-spreading layer significantly reduces series resistance effects and enables a reliable capacitance-voltage measurement of low dopant concentrations of p-type wells in n-type epitaxial layers. The measurement of an Al box-like profile implanted at 500 °C and resulting in a doping concentration of 3·1017 cm-3 shows full activation after annealing at 1800 °C for 30 minutes.
Liu M., Coppola A., Alvi M., Anwar M.
2022-05-05 citations by CoLab: 59 Abstract  
Power modules are core components of inverters in electric vehicles and their packaging technology has a critical impact on system performance and reliability. Conventional single sided cooled power modules have been one of the most common package structures for automotive applications. However, this design limits the performance of IGBT and future SiC power module due to parasitic inductance and heat dissipation issues. Power module packaging technologies have been experiencing extensive changes as the performance expectations of the power semiconductor has increased. Over the past few decades, methods of double-sided cooling have attracted increased interest to enhance the power density of the inverter and effectively reduce their cost. This paper presents a comprehensive review of double-sided cooled packaging technology for automotive power modules. Technical details and innovative features of state-of-the-art automotive power modules from research institutes and major industry manufacturers are reviewed and their path into commercial vehicles is evaluated.
Langpoklakpam C., Liu A., Chu K., Hsu L., Lee W., Chen S., Sun C., Shih M., Lee K., Kuo H.
Crystals scimago Q2 wos Q3 Open Access
2022-02-11 citations by CoLab: 104 PDF Abstract  
Owing to the superior properties of silicon carbide (SiC), such as higher breakdown voltage, higher thermal conductivity, higher operating frequency, higher operating temperature, and higher saturation drift velocity, SiC has attracted much attention from researchers and the industry for decades. With the advances in material science and processing technology, many power applications such as new smart energy vehicles, power converters, inverters, and power supplies are being realized using SiC power devices. In particular, SiC MOSFETs are generally chosen to be used as a power device due to their ability to achieve lower on-resistance, reduced switching losses, and high switching speeds than the silicon counterpart and have been commercialized extensively in recent years. A general review of the critical processing steps for manufacturing SiC MOSFETs, types of SiC MOSFETs, and power applications based on SiC power devices are covered in this paper. Additionally, the reliability issues of SiC power MOSFET are also briefly summarized.
Roccaforte F., Giannazzo F., Greco G.
2022-01-10 citations by CoLab: 31 PDF Abstract  
Wide band gap semiconductors such as silicon carbide (SiC) and gallium nitride (GaN) are excellent materials for the next generation of high-power and high-frequency electronic devices. In fact, their wide band gap (>3 eV) and high critical electric field (>2 MV/cm) enable superior performances to be obtained with respect to the traditional silicon devices. Hence, today, a variety of diodes and transistors based on SiC and GaN are already available in the market. For the fabrication of these electronic devices, selective doping is required to create either n-type or p-type regions with different functionalities and at different doping levels (typically in the range 1016–1020 cm−3). In this context, due to the low diffusion coefficient of the typical dopant species in SiC, and to the relatively low decomposition temperature of GaN (about 900 °C), ion implantation is the only practical way to achieve selective doping in these materials. In this paper, the main issues related to ion implantation doping technology for SiC and GaN electronic devices are briefly reviewed. In particular, some specific literature case studies are illustrated to describe the impact of the ion implantation doping conditions (annealing temperature, electrical activation and doping profiles, surface morphology, creation of interface states, etc.) on the electrical parameters of power devices. Similarities and differences in the application of ion implantation doping technology in the two materials are highlighted in this paper.
Racka-Szmidt K., Stonio B., Żelazko J., Filipiak M., Sochacki M.
Materials scimago Q2 wos Q2 Open Access
2021-12-24 citations by CoLab: 82 PDF Abstract  
The inductively coupled plasma reactive ion etching (ICP-RIE) is a selective dry etching method used in fabrication technology of various semiconductor devices. The etching is used to form non-planar microstructures—trenches or mesa structures, and tilted sidewalls with a controlled angle. The ICP-RIE method combining a high finishing accuracy and reproducibility is excellent for etching hard materials, such as SiC, GaN or diamond. The paper presents a review of silicon carbide etching—principles of the ICP-RIE method, the results of SiC etching and undesired phenomena of the ICP-RIE process are presented. The article includes SEM photos and experimental results obtained from different ICP-RIE processes. The influence of O2 addition to the SF6 plasma as well as the change of both RIE and ICP power on the etching rate of the Cr mask used in processes and on the selectivity of SiC/Cr etching are reported for the first time. SiC is an attractive semiconductor with many excellent properties, that can bring huge potential benefits thorough advances in submicron semiconductor processing technology. Recently, there has been an interest in SiC due to its potential wide application in power electronics, in particular in automotive, renewable energy and rail transport.
Bellocchi G., Vivona M., Bongiorno C., Badalà P., Bassi A., Rascuna' S., Roccaforte F.
Solid-State Electronics scimago Q3 wos Q4
2021-12-01 citations by CoLab: 18 Abstract  
• Controlling of Schottky barrier in SiC diodes. • Effect of temperature on the Schottky contact quality and barrier height. • Effect of thickness of the Schottky contact in quality and height of the barrier. In this work, we investigated the effects of annealing temperature and metal thickness on the Schottky barrier height in state-of-the-art Ti/4H-SiC rectifiers. By varying these two parameters, a controlled lowering of the Schottky barrier height has been obtained, thus giving the possibility to improve the efficiency of device in terms of power consumption.
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